详细说明:Verilog变成100例,里面包含了Verilog编程中常见的一些例子,对于新手还是很有帮助的。-Verilog into 100 cases, they include a Verilog Programming common examples is very helpful for the novice.
[LDPC.zip] - 用于LDPC编码译码的仿真实现。包括随机生成校验矩阵、由校验矩阵产生生成矩阵、编码、加随机噪声、译码等内容。原作者是老外,有部分中文注释。
[sram.zip] - sram 读写小程序,用verilog编写的,请各位高手指教
[ACCUME.rar] - 强调verilog代码编写规范,经常是一个不太受欢迎的话题,但却是非常有必要的。 每个代码编写者都有自己的编写习惯,而且都喜欢按照自己的习惯去编写
[vhdlsource.rar] - 用verilog hdl编写的一些例程,包括加法器/减法器等等,例子较多就不一一列举了
[verilogBook.rar] - verilog HDL硬件描述语言的教程
[verilog_ADD_Companion.zip] - 你自己漫漫理解吧,我市转载的
[canbus(FPGA).rar] - 基于FPGA的can 总线设计,采用verilog语言编写。在FPGA的开发环境下,新建一个工程,然后将本文件中的各个源代码添加进工程里,即可运行仿真。
[source3-6.rar] - verilog hdl教程135例:verilog hdl语言类似于C语言,便于学习。本文档带有源代码,3-6章
[videodigitalsignalscontroller.rar] - 用fpga技术实现基本的视频信号处理:主题程序;视频图象数据采集程序;sram的读写控制;测试程序
[veriexamples.rar] - 非常多的verilog实例,对于刚入门者比较有用
[sram.zip] - sram 读写小程序,用verilog编写的,请各位高手指教
[ACCUME.rar] - 强调verilog代码编写规范,经常是一个不太受欢迎的话题,但却是非常有必要的。 每个代码编写者都有自己的编写习惯,而且都喜欢按照自己的习惯去编写
[vhdlsource.rar] - 用verilog hdl编写的一些例程,包括加法器/减法器等等,例子较多就不一一列举了
[verilogBook.rar] - verilog HDL硬件描述语言的教程
[verilog_ADD_Companion.zip] - 你自己漫漫理解吧,我市转载的
[canbus(FPGA).rar] - 基于FPGA的can 总线设计,采用verilog语言编写。在FPGA的开发环境下,新建一个工程,然后将本文件中的各个源代码添加进工程里,即可运行仿真。
[source3-6.rar] - verilog hdl教程135例:verilog hdl语言类似于C语言,便于学习。本文档带有源代码,3-6章
[videodigitalsignalscontroller.rar] - 用fpga技术实现基本的视频信号处理:主题程序;视频图象数据采集程序;sram的读写控制;测试程序
[veriexamples.rar] - 非常多的verilog实例,对于刚入门者比较有用
文件列表(点击判断是否您需要的文件):
Verilog例子
...........\chap10
...........\......\acc.v
...........\......\accn.v
...........\......\adder8.v
...........\......\control.v
...........\......\fsm.v
...........\......\longframe1.v
...........\......\longframe2.v
...........\......\pipeline.v
...........\......\reg8.v
...........\......\resource1.v
...........\......\resource2.v
...........\chap11
...........\......\account.v
...........\......\clock.v
...........\......\count10.v
...........\......\fre_ctrl.v
...........\......\paobiao.v
...........\......\sell.v
...........\......\song.v
...........\......\traffic.v
...........\chap12
...........\......\add_ahead.v
...........\......\add_jl.v
...........\......\add_tree.v
...........\......\correlator.v
...........\......\crc.v
...........\......\cycle.v
...........\......\decoder1.v
...........\......\decoder2.v
...........\......\fir.v
...........\......\linear.v
...........\......\mult4x4.v
...........\chap3
...........\.....\adder_tp.v
...........\.....\count4_tp.v
...........\.....\Verilog1.qpf
...........\.....\Verilog1.v
...........\chap5
...........\.....\adder16.v
...........\.....\alu.v
...........\.....\count.v
...........\.....\count60.v
...........\.....\decode4_7.v
...........\.....\mult_for.v
...........\.....\mult_repeat.v
...........\.....\mux4_1.v
...........\.....\mux_casez.v
...........\.....\test.v
...........\.....\voter7.v
...........\.....\wave1.v
...........\.....\wave2.v
...........\chap6
...........\.....\alutask.v
...........\.....\alu_tp.v
...........\.....\code_83.v
...........\.....\count.v
...........\.....\funct.v
...........\.....\funct_tp.v
...........\chap7
...........\.....\add4_1.v
...........\.....\full_add1.v
...........\.....\full_add4.v
...........\.....\full_add5.v
...........\.....\half_add3.v
...........\.....\mux4_1a.v
...........\.....\mux4_1b.v
...........\.....\mux4_1c.v
...........\chap8
...........\.....\add8_tp.v
...........\.....\carry_udp.v
...........\.....\carry_udpx1.v
...........\.....\carry_udpx2.v
...........\.....\count8_tp.v
...........\.....\dff.v
...........\.....\dff_udp.v
...........\.....\latch.v
...........\.....\mult_tp.v
...........\.....\mux31.v
...........\.....\mux_tp.v
...........\.....\random_tp.v
... ...
Verilog例子
...........\chap10
...........\......\acc.v
...........\......\accn.v
...........\......\adder8.v
...........\......\control.v
...........\......\fsm.v
...........\......\longframe1.v
...........\......\longframe2.v
...........\......\pipeline.v
...........\......\reg8.v
...........\......\resource1.v
...........\......\resource2.v
...........\chap11
...........\......\account.v
...........\......\clock.v
...........\......\count10.v
...........\......\fre_ctrl.v
...........\......\paobiao.v
...........\......\sell.v
...........\......\song.v
...........\......\traffic.v
...........\chap12
...........\......\add_ahead.v
...........\......\add_jl.v
...........\......\add_tree.v
...........\......\correlator.v
...........\......\crc.v
...........\......\cycle.v
...........\......\decoder1.v
...........\......\decoder2.v
...........\......\fir.v
...........\......\linear.v
...........\......\mult4x4.v
...........\chap3
...........\.....\adder_tp.v
...........\.....\count4_tp.v
...........\.....\Verilog1.qpf
...........\.....\Verilog1.v
...........\chap5
...........\.....\adder16.v
...........\.....\alu.v
...........\.....\count.v
...........\.....\count60.v
...........\.....\decode4_7.v
...........\.....\mult_for.v
...........\.....\mult_repeat.v
...........\.....\mux4_1.v
...........\.....\mux_casez.v
...........\.....\test.v
...........\.....\voter7.v
...........\.....\wave1.v
...........\.....\wave2.v
...........\chap6
...........\.....\alutask.v
...........\.....\alu_tp.v
...........\.....\code_83.v
...........\.....\count.v
...........\.....\funct.v
...........\.....\funct_tp.v
...........\chap7
...........\.....\add4_1.v
...........\.....\full_add1.v
...........\.....\full_add4.v
...........\.....\full_add5.v
...........\.....\half_add3.v
...........\.....\mux4_1a.v
...........\.....\mux4_1b.v
...........\.....\mux4_1c.v
...........\chap8
...........\.....\add8_tp.v
...........\.....\carry_udp.v
...........\.....\carry_udpx1.v
...........\.....\carry_udpx2.v
...........\.....\count8_tp.v
...........\.....\dff.v
...........\.....\dff_udp.v
...........\.....\latch.v
...........\.....\mult_tp.v
...........\.....\mux31.v
...........\.....\mux_tp.v
...........\.....\random_tp.v
... ...