详细说明:usb2.0 ip 文挡齐全,并已经过FPGA的验证,希望大家支持
近期下载过的用户:
毛军捷 [查看上载者kin的更多信息]
[rom_des.zip] - DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。
[Firmware.rar] - philiphs D12 firmware驱动程序
[usb 2.0 IP Core.rar] - usb20的IP CORE,可以直接用在SOPC下,自动完成全部的枚举,只需修改枚举参数即可!
[usb_phy.rar] - usb接口协议。It was tested with a USB 1.1 core I have written on a XESS XCV800 board with a a Philips PDIUSBP11A transceiver.
[fpga_RGB_to_YCbCr.rar] - 在视频设计中#通常要实现色空间转换#该转换是对后级信号进行处理的基础本文介绍一种RGB色空间到YCrCb色空间转换的电路设计
[usb2.0+fpga+DSP.rar] - usb2.0 + fpga + dsp 开发板的原理图,希望对大家有用
[Wave_OF_TINUX.rar] - 用VC编写一个直接读写WAV文件二进制数据,并在窗口中绘出波形图的Windows应用程序。
[TESTAT24C08.rar] - 自己写的测试AT24C08的程序,基于wince5.0,S3C2440,在EVC4.0下编译
[Firmware.rar] - philiphs D12 firmware驱动程序
[usb 2.0 IP Core.rar] - usb20的IP CORE,可以直接用在SOPC下,自动完成全部的枚举,只需修改枚举参数即可!
[usb_phy.rar] - usb接口协议。It was tested with a USB 1.1 core I have written on a XESS XCV800 board with a a Philips PDIUSBP11A transceiver.
[fpga_RGB_to_YCbCr.rar] - 在视频设计中#通常要实现色空间转换#该转换是对后级信号进行处理的基础本文介绍一种RGB色空间到YCrCb色空间转换的电路设计
[usb2.0+fpga+DSP.rar] - usb2.0 + fpga + dsp 开发板的原理图,希望对大家有用
[Wave_OF_TINUX.rar] - 用VC编写一个直接读写WAV文件二进制数据,并在窗口中绘出波形图的Windows应用程序。
[TESTAT24C08.rar] - 自己写的测试AT24C08的程序,基于wince5.0,S3C2440,在EVC4.0下编译
文件列表(点击判断是否您需要的文件):
usb_funct
.........\bench
.........\.....\CVS
.........\.....\verilog
.........\.....\.......\CVS
.........\doc
.........\...\CVS
.........\...\README.txt
.........\...\STATUS.txt
.........\...\usb_doc.pdf
.........\rtl
.........\...\CVS
.........\...\verilog
.........\...\.......\CVS
.........\...\.......\...\Entries
.........\...\.......\usbf_crc16.v
.........\...\.......\usbf_crc5.v
.........\...\.......\usbf_defines.v
.........\...\.......\usbf_ep_rf.v
.........\...\.......\usbf_ep_rf_dummy.v
.........\...\.......\usbf_idma.v
.........\...\.......\usbf_mem_arb.v
.........\...\.......\usbf_pa.v
.........\...\.......\usbf_pd.v
.........\...\.......\usbf_pe.v
.........\...\.......\usbf_pl.v
.........\...\.......\usbf_rf.v
.........\...\.......\usbf_top.v
.........\...\.......\usbf_utmi_if.v
.........\...\.......\usbf_utmi_ls.v
.........\...\.......\usbf_wb.v
.........\sim
.........\...\CVS
.........\...\rtl_sim
.........\...\.......\bin
.........\...\.......\...\CVS
.........\...\.......\CVS
.........\...\.......\run
.........\...\.......\...\CVS
.........\syn
.........\...\bin
.........\...\...\comp.dc
.........\...\...\CVS
.........\...\...\design_spec.dc
.........\...\...\lib_spec.dc
.........\...\...\read.dc
.........\...\CVS
.........\...\log
.........\...\...\CVS
.........\...\out
.........\...\...\CVS
... ...
usb_funct
.........\bench
.........\.....\CVS
.........\.....\verilog
.........\.....\.......\CVS
.........\doc
.........\...\CVS
.........\...\README.txt
.........\...\STATUS.txt
.........\...\usb_doc.pdf
.........\rtl
.........\...\CVS
.........\...\verilog
.........\...\.......\CVS
.........\...\.......\...\Entries
.........\...\.......\usbf_crc16.v
.........\...\.......\usbf_crc5.v
.........\...\.......\usbf_defines.v
.........\...\.......\usbf_ep_rf.v
.........\...\.......\usbf_ep_rf_dummy.v
.........\...\.......\usbf_idma.v
.........\...\.......\usbf_mem_arb.v
.........\...\.......\usbf_pa.v
.........\...\.......\usbf_pd.v
.........\...\.......\usbf_pe.v
.........\...\.......\usbf_pl.v
.........\...\.......\usbf_rf.v
.........\...\.......\usbf_top.v
.........\...\.......\usbf_utmi_if.v
.........\...\.......\usbf_utmi_ls.v
.........\...\.......\usbf_wb.v
.........\sim
.........\...\CVS
.........\...\rtl_sim
.........\...\.......\bin
.........\...\.......\...\CVS
.........\...\.......\CVS
.........\...\.......\run
.........\...\.......\...\CVS
.........\syn
.........\...\bin
.........\...\...\comp.dc
.........\...\...\CVS
.........\...\...\design_spec.dc
.........\...\...\lib_spec.dc
.........\...\...\read.dc
.........\...\CVS
.........\...\log
.........\...\...\CVS
.........\...\out
.........\...\...\CVS
... ...